The 74VHC126-Q100; 74VHCT126-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7-A. The 74VHC126-Q100; 74VHCT126-Q100 provide four non-inverting buffer/line drivers with 3-state outputs. The output enable input (nOE) controls the 3-state outputs (nY). .
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Balanced propagation delays
• All inputs have Schmitt-trigger action
• Inputs accept voltages higher than VCC
• Input levels:
• The 74VHC126-Q100 operates with CMOS input level
• The 74VHCT126-Q100 operates with TTL input level
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automati.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74VHC126 |
STMicroelectronics |
QUAD BUS BUFFERS | |
2 | 74VHC126 |
NXP |
Quad buffer/line driver | |
3 | 74VHC126 |
nexperia |
Quad buffer/line driver | |
4 | 74VHC123A |
Fairchild Semiconductor |
Dual Retriggerable Monostable Multivibrator | |
5 | 74VHC125 |
STMicroelectronics |
QUAD BUS BUFFERS | |
6 | 74VHC125 |
Fairchild Semiconductor |
Quad Buffer | |
7 | 74VHC125 |
NXP |
Quad buffer/line driver | |
8 | 74VHC125 |
nexperia |
Quad buffer/line driver | |
9 | 74VHC112 |
Fairchild Semiconductor |
Dual J-K Flip-Flops | |
10 | 74VHC132 |
STMicroelectronics |
QUAD 2-INPUT SCHMITT NAND GATE | |
11 | 74VHC132 |
Fairchild Semiconductor |
Quad 2-Input NAND Schmitt Trigger | |
12 | 74VHC132 |
National Semiconductor |
Quad 2-Input NAND Schmitt Trigger |