The LVX161284 contains eight bidirectional data buffers and eleven control/status buffers to implement a full IEEE 1284 compliant interface. The device supports the IEEE 1284 standard and is intended to be used in an Extended Capabilities Port mode (ECP). The pinout allows for easy connection from the Peripheral (A-side) to the Host (cable side). Outputs on .
s Supports IEEE 1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications between personal computers and printing peripherals s Translation capability allows outputs on the cable side to interface with 5V signals s All inputs have hysteresis to provide noise margin s B and Y output resistance optimized to drive external cable s B and Y outputs in high impedance mode during power down s Inputs and outputs on cable side have internal pull-up resistors s Flow-through pin configuration allows easy interface between the “Peripheral and Host” s Replaces the function of t.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74LVX161284A |
Fairchild Semiconductor |
Low Voltage IEEE 161284 Translating Transceiver | |
2 | 74LVX16244 |
STMicroelectronics |
16-BIT BUS BUFFER | |
3 | 74LVX16245 |
STMicroelectronics |
16-BIT BUS TRANSCEIVER | |
4 | 74LVX163 |
Fairchild Semiconductor |
Low Voltage Synchronous Binary Counter | |
5 | 74LVX16373 |
ST Microelectronics |
LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH | |
6 | 74LVX112 |
Fairchild Semiconductor |
Low Voltage Dual J-K Flip-Flops | |
7 | 74LVX125 |
Fairchild Semiconductor |
Low Voltage Quad Buffer | |
8 | 74LVX125 |
STMicroelectronics |
LOW VOLTAGE QUAD BUS BUFFERS | |
9 | 74LVX125 |
National Semiconductor |
Low-Voltage Quad Buffer | |
10 | 74LVX132 |
Fairchild Semiconductor |
Low Voltage Quad 2-Input NAND Schmitt Trigger | |
11 | 74LVX138 |
Fairchild Semiconductor |
Low Voltage 1-of-8 Decoder/Demultiplexer | |
12 | 74LVX14 |
Fairchild Semiconductor |
Low Voltage Hex Inverter |