74LVC1G386 - NXP Semiconductors

74LVC1G386 3-input EXCLUSIVE-OR gate

The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications .

Features

s Wide supply voltage range from 1.65 to 5.5 V s High noise immunity s Complies with JEDEC standard: x JESD8-7 (1.65 V to 1.95 V) x JESD8-5 (2.3 V to 2.7 V) x JESD8B/JESD36 (2.7 V to 3.6 V) s ±24 mA output drive (VCC = 3.0 V) s Latch-up performance exceeds 250 mA s CMOS low power consumption s Direct interface with TTL levels s Inputs accept voltages up to 5 V s ESD protection: x HBM EIA/JESD22-A114E exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s SOT363 and SOT457 package s Specified from −40 to +85 °C and −40 to +125 °C. 3. Ordering information Table 1. Ordering information Package Te.