74LS279 - Fairchild Semiconductor

74LS279 Quad S-R Latch

The DM74LS279 consists of four individual and independent Set-Reset Latches with active low inputs. Two of the four latches have an additional S input ANDed with the primary S input. A LOW on any S input while the R input is HIGH will be stored in the latch and appear on the corresponding Q output as a HIGH. A LOW on the R input while the S input is HIGH wil.

Features

ding the suffix letter “X” to the ordering code. Connection Diagram Function Table Inputs S (Note 1) L L H H R L H L H Output Q H (Note 2) H L Q0 H = HIGH Level L = LOW Level Q0 = The Level of Q before the indicated input conditions were established. Note 1: For latches with double S inputs: H = both S inputs HIGH L = one or both S inputs LOW Note 2: This output level is pseudo stable; that is, it may not persist when the S and R inputs return to their inactive (HIGH) level. © 2000 Fairchild Semiconductor Corporation DS006420 www.fairchildsemi.com DM74LS279 Absolute Maximum Ratings(Not.