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The 74HC163-Q100; 74HCT163-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW. A LOW at the parallel enable input (PE) disables th.
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Complies with JEDEC standard no. 7A
• Input levels:
• For 74HC163: CMOS level
• For 74HCT163: TTL level
• Synchronous counting and loading
• 2 count enable inputs for n-bit cascading
• Synchronous reset
• Positive-edge triggered clock
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
• Multiple package options
Nexperia
74HC163-Q100; 74HCT163-Q100
Presettable sy.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | 74HCT163 |
Philips |
Presettable synchronous 4-bit binary counter |
|
| 2 | 74HCT163 |
nexperia |
Presettable synchronous 4-bit binary counter |
|
| 3 | 74HCT163D |
nexperia |
Presettable synchronous 4-bit binary counter |
|
| 4 | 74HCT163DB |
nexperia |
Presettable synchronous 4-bit binary counter |
|
| 5 | 74HCT163PW |
nexperia |
Presettable synchronous 4-bit binary counter |
|
| 6 | 74HCT160 |
Philips |
Presettable synchronous BCD decade counter |
|
| 7 | 74HCT161 |
Philips |
Presettable synchronous 4-bit binary counter |
|
| 8 | 74HCT162 |
Philips |
Presettable synchronous BCD decade counter |
|
| 9 | 74HCT164 |
nexperia |
shift register |
|
| 10 | 74HCT164 |
Diodes |
8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS |
|
| 11 | 74HCT164 |
NXP |
8-bit serial-in / parallel-out shift register |
|
| 12 | 74HCT164-Q100 |
nexperia |
shift register |
|