The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes. This enables the use of curre.
Input levels: For 74HC139: CMOS level For 74HCT139: TTL level
Demultiplexing capability
2 independent 2-to-4 decoders
Multifunction capability
Suitable for memory decoding, data routing or code conversion
Complies with JEDEC standard no. 7A
Active LOW mutually exclusive outputs
ESD protection:
HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V
Mult.
The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to n.
The SNx4HC139 contains two two-to-four decoders with one active low output strobe G. When the outputs of one channel ar.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74HC131 |
Hitachi Semiconductor |
3-to-8-line Decoder/Demultiplexer | |
2 | 74HC132 |
Texas Instruments |
Quadruple 2-Input NAND Gates | |
3 | 74HC132 |
NXP |
Quad 2-input NAND Schmitt trigger | |
4 | 74HC132 |
nexperia |
Quad 2-input NAND Schmitt trigger | |
5 | 74HC132-Q100 |
nexperia |
Quad 2-input NAND Schmitt trigger | |
6 | 74HC132D |
Toshiba |
Quad 2-Input Schmitt NAND Gate | |
7 | 74HC132D |
nexperia |
Quad 2-input NAND Schmitt trigger | |
8 | 74HC133 |
Philips |
13-input NAND gate | |
9 | 74HC133 |
National Semiconductor |
13-Input NAND Gate | |
10 | 74HC137 |
Philips |
3-to-8 line decoder/demultiplexer | |
11 | 74HC137 |
Texas Instruments |
High-Speed CMOS Logic 3 to 8-Line Decoder/Demultiplexer | |
12 | 74HC137 |
nexperia |
3-to-8 line decoder/demultiplexer |