The 74F825 is an 8-bit buffered register. It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems. Also included in the 74F825 are multiple enables that allow multi-user control of the interface. Features s 3-STATE output s Clock enable and clear s Multiple output enables Ordering Code:.
which are ideal for parity bus interfacing in high performance microprogramming systems. Also included in the 74F825 are multiple enables that allow multi-user control of the interface. Features s 3-STATE output s Clock enable and clear s Multiple output enables Ordering Code: Order Number 74F825SC 74F825SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the orderin.
The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing regis.
The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacin.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74F821 |
Philips |
Bus interface registers | |
2 | 74F821 |
Fairchild |
10-Bit D-Type Flip-Flop | |
3 | 74F821 |
National |
10-Bit D-Type Flip-Flop | |
4 | 74F822 |
Philips |
Bus interface registers | |
5 | 74F823 |
Fairchild |
9-Bit D-Type Flip-Flop | |
6 | 74F823 |
Philips |
Bus interface registers | |
7 | 74F823 |
National |
9-Bit D-Type Flip-Flop | |
8 | 74F824 |
Philips |
Bus interface registers | |
9 | 74F826 |
Philips |
Bus interface registers | |
10 | 74F827 |
Philips |
10-bit buffer/line driver | |
11 | 74F827 |
Fairchild |
10-Bit Buffers/Line Drivers | |
12 | 74F827 |
National |
10-Bit Buffers/Line Drivers |