74C2526 - National Semiconductor

74C2526 1-to-8 Minimum Skew Clock Driver

On the multiplexed clock device the SEL pin is used to determine which CLKn input will have an active effect on the outputs of the circuit When SEL e 1 the CLK1 input is selected and when SEL e 0 the CLK0 input is selected The non-selected CLKn input will not have any effect on the logical output level of the circuit The output pins act as a single entity an.

Features

Y Y Y Y Y Y Y Y Y These CGS devices implement National’s FACTTM family Ideal for signal generation and clock distribution Guaranteed pin to pin and part to part skew Multiplexed clock input (’2526) Guaranteed 2 kV minimum ESD protection Symmetric output current drive of 24 mA for IOL IOH ’CT has TTL-compatible inputs These products are identical to 74AC ACT2525 and 2526 Available as Mil Aero versions 54AC ACT2525 54AC ACT2526 Logic Symbols ’2525 Connection Diagrams Pin Assignment for DIP and SOIC ’2525 TL F 10684
  – 1 ’2526 TL F 10684
  – 3 ’2526 TL F 10684
  – 2 TL F 10684
  – 4 TRI-STATE i.