The 74AXP1G125 is a single buffer/line driver with 3-state output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.7 V to 2.75 V. It is fully specified for partial power down applications using IOFF. The IO.
• Wide supply voltage range from 0.7 V to 2.75 V
• Low input capacitance; CI = 0.5 pF (typical)
• Low output capacitance; CO = 1.0 pF (typical)
• Low dynamic power consumption; CPD = 2.5 pF at VCC = 1.2 V (typical)
• Low static power consumption; ICC = 0.6 μA (85 °C maximum)
• High noise immunity
• Complies with JEDEC standard:
• JESD8-12A.01 (1.1 V to 1.3 V)
• JESD8-11A.01 (1.4 V to 1.6 V)
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A.01 (2.3 V to 2.7 V)
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
• CDM JESD22-C101E exceeds 1000 V
• Latch-up performance exceeds 100 mA per J.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74AXP1G10 |
nexperia |
Low-power 3-input NAND gate | |
2 | 74AXP1G11 |
nexperia |
Low-power 3-input AND gate | |
3 | 74AXP1G14 |
nexperia |
Low-power Schmitt trigger inverter | |
4 | 74AXP1G157 |
nexperia |
Single 2-input multiplexer | |
5 | 74AXP1G17 |
nexperia |
Low-power Schmitt trigger | |
6 | 74AXP1G00 |
nexperia |
Low-power 2-input NAND gate | |
7 | 74AXP1G02 |
nexperia |
Low-power 2-input NOR gate | |
8 | 74AXP1G04 |
nexperia |
Low-power inverter | |
9 | 74AXP1G06 |
nexperia |
Low-power inverter | |
10 | 74AXP1G07 |
nexperia |
Low-power buffer | |
11 | 74AXP1G08 |
nexperia |
Low-power 2-input AND gates | |
12 | 74AXP1G09 |
nexperia |
Low-power 2-input AND gate |