The 74AUP1T00 provides the single 2-input NAND function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. The 74AUP1T00 is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.
• Wide supply voltage range from 2.3 V to 3.6 V
• High noise immunity
• ESD protection:
• HBM JESD22-A114F Class 3A exceeds 5000 V
• CDM JESD22-C101E exceeds 1000 V
• Low static power consumption; ICC = 1.5 μA (maximum)
• Latch-up performance exceeds 100 mA per JESD 78 Class II
• Inputs accept voltages up to 3.6 V
• Low noise overshoot and undershoot < 10 % of VCC
• IOFF circuitry provides partial power-down mode operation
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Type number Package
Temperature range Name 74AUP1T00GW -40 °C.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74AUP1T02 |
nexperia |
Low-power 2-input NOR gate | |
2 | 74AUP1T04 |
nexperia |
Low-power inverter | |
3 | 74AUP1T08 |
nexperia |
Low-power 2-input AND gate | |
4 | 74AUP1T14 |
nexperia |
Low-power inverter | |
5 | 74AUP1T17 |
nexperia |
Low-power buffer | |
6 | 74AUP1T32 |
nexperia |
Low-power 2-input OR-gate | |
7 | 74AUP1T34 |
nexperia |
Low-power dual supply translating buffer | |
8 | 74AUP1T34-Q100 |
nexperia |
Low-power dual supply translating buffer | |
9 | 74AUP1T45 |
nexperia |
Low-power dual supply translating transceiver | |
10 | 74AUP1T50 |
nexperia |
Low-power buffer | |
11 | 74AUP1T57 |
NXP |
Low-power Configurable Gate | |
12 | 74AUP1T57 |
nexperia |
Low-power configurable gate |