74ACT109 - Fairchild Semiconductor

74ACT109 Dual JK Positive Edge-Triggered Flip-Flop

The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs: – – – – LOW input to SD (Set) .

Features

■ ICC reduced by 50%
■ Outputs source/sink 24mA
■ ACT109 has TTL-compatible inputs tm General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs:
  –
  –
  –
  – LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and S.