These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the direction control (DIR) input. The enable input (G.
s Bi-Directional bus transceiver in a high-density 20-pin package s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at bus inputs improve noise margins s Typical propagation delay times, port-to-port 8 ns s Typical enable/disable times 17 ns s IOL (sink current) 24 mA s IOH (source current) −15 mA Ordering Code: Order Number DM74LS245WM DM74LS245SJ DM74LS245N Package Number M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 2.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 74240 |
Fairchild Semiconductor |
Octal 3-STATE Buffer/Line Driver/Line Receiver | |
2 | 74240 |
San Mao |
Eight three-state inverting buffer / line driver / line receiver | |
3 | 74244 |
Fairchild Semiconductor |
Octal 3-STATE Buffer/Line Driver/Line Receiver | |
4 | 74244 |
ETC |
Octal 3-STATE Buffer/Line Driver/Line Receiver | |
5 | 74247 |
National Semiconductor |
BCD to 7-Segment Decoder/Driver | |
6 | 74248 |
ETC |
BCD to 7-Segment Decoder/Driver | |
7 | 7420 |
Fairchild Semiconductor |
Dual 4-Input NAND Gates | |
8 | 7420 |
NTE |
Dual 4-Input Positive NAND Gate | |
9 | 7421 |
Fairchild Semiconductor |
Dual 4-Input Positive AND Gate | |
10 | 74221 |
NXP |
Dual non-retriggerable monostable multivibrator | |
11 | 74221 |
Fairchild Semiconductor |
Dual Non-Retriggerable Monostable Multivibrator | |
12 | 74221 |
Hitachi Semiconductor |
Dual Monostable Multivibrators |