These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the .
ACKAGE SN74LS125A, SN74LS126A . . . D, N, OR NS PACKAGE
(TOP VIEW)
1G, 1G
* 1 1A 2 1Y 3
2G, 2G
* 4 2A 5 2Y 6
GND 7
14 VCC 13 4G, 4G
* 12 4A 11 4Y 10 3G, 3G
* 9 3A 8 3Y
*G on ’125 and ’LS125A devices; G on 126 and ’LS126A devices
SN54LS125A, SN54LS126A . . . FK PACKAGE (TOP VIEW)
1A 1G, 1G
* NC VCC 4G, 4G
*
1Y NC 2G, 2G
* NC 2A
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A NC 4Y NC 3G, 3G
*
2Y GND
NC 3Y 3A
*G on ’125 and ’LS125A devices; G on 126 and ’LS126A devices NC
– No internal connection
Please be aware that an important notice concerning availability, standard warran.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 54LS122 |
Texas Instruments |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS | |
2 | 54LS122 |
Motorola |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS | |
3 | 54LS123 |
Motorola |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS | |
4 | 54LS123 |
Texas Instruments |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS | |
5 | 54LS126A |
Texas Instruments |
QUADRUPLE BUS BUFFERS | |
6 | 54LS128 |
TW |
LSTTL type four 2-input NOR line driver | |
7 | 54LS10 |
National Semiconductor |
Triple 3-Input NAND Gates | |
8 | 54LS109 |
National Semiconductor |
Dual Positive-Edge-Triggered J-K Flip-Flops | |
9 | 54LS109A |
Texas Instruments |
Dual J-K Positive-Edge-Triggered Flip-Flops | |
10 | 54LS11 |
National Semiconductor |
Triple 3-Input AND Gates | |
11 | 54LS114 |
National Semiconductor |
Dual JK Flip-Flop | |
12 | 54LS13 |
National Semiconductor |
DUAL 4-INPUT SCHMITT TRIGGER |