The ’F410 is a register-oriented high-speed 64-bit Read Write Memory organized as 16-words by 4-bits An edgetriggered 4-bit output register allows new input data to be written while previous data is held TRI-STATE outputs are provided for maximum versatility The ’F410 is fully compatible with all TTL families Features Y Edge-triggered output register Y Typi.
Y Edge-triggered output register Y Typical access time of 35 ns Y TRI-STATE outputs Y Optimized for register stack operation Y 18-pin package Y 9410 replacement Commercial Military Package Number Package Description 74F410PC N18A 18-Lead (0 300 Wide) Molded Dual-In-Line 54F410DM (Note 1) J18A 18-Lead Ceramic Dual-In-Line 74F410SC M20B 20-Lead (0 300 Wide) Molded Small Outline JEDEC 54F410LM W20A 20-Lead Cerpak Note 1 Military grade device with environmental and burn-in processing Use suffix e DMQB LMQB Logic Symbol Connection Diagrams Pin Assignment for DIP and SOIC Pin As.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 54F413 |
National Semiconductor |
64 x 4 First-In First-Out Buffer Memory | |
2 | 54F402 |
National Semiconductor |
Serial Data Polynomial Generator/Checker | |
3 | 54F00 |
National Semiconductor |
Quad 2-Input NAND Gate | |
4 | 54F02 |
National Semiconductor |
Quad 2-Input NOR Gate | |
5 | 54F04 |
National Semiconductor |
Hex Inverter | |
6 | 54F08 |
National Semiconductor |
Quad 2-Input AND Gate | |
7 | 54F10 |
Texas Instruments |
TRIPLE 3-INPUT POSITIVE-NAND GATE | |
8 | 54F109 |
Texas Instruments |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP | |
9 | 54F11 |
Texas Instruments |
Triple 3-Input AND Gate | |
10 | 54F138 |
Texas Instruments |
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS | |
11 | 54F14 |
National Semiconductor |
Hex Inverter Schmitt Trigger | |
12 | 54F151A |
National Semiconductor |
8-Input Multiplexer |