54ACT74 - National Semiconductor

54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop

The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After t.

Features

n n n n ICC reduced by 50% Output source/sink 24 mA ’ACT74 has TTL-compatible inputs Standard Microcircuit Drawing (SMD) — ’AC74: 5962-88520 — ’ACT74: 5962-87525 Logic Symbols DS100266-2 DS100266-1 Pin Names IEEE/IEC D1, D2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q1, Q2, Q2 Description Data Inputs Clock Pulse Inputs Direct Clear Inputs Direct Set Inputs Outputs DS100266-3 FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100266 www.national.com Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS10.