This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flop after a complete clock pulse While the clock is low the slave is isolated from the master On the positive transition of the clock the data from the J and K inputs is transferred to the master While the clock i.
Y Alternate Military Aerospace device (5476) is available Contact a National Semiconductor Sales Office Distributor for specifications
Connection Diagram
Function Table
Dual-In-Line Package
TL F 6528
– 1
Order Number 5476DMQB 5476FMQB DM5476J DM5476W or DM7476N
See NS Package Number J16A N16E or W16A
Inputs
Outputs
PR CLR CLK J K
Q
Q
LH HL LL HH HH HH HH
X
XX
H
L
X XX L
H
X
XX
H
H
LL HL
Q0 H
Q0 L
LH
L
H
HH
Toggle
H e High Logic Level
L e Low Logic Level
X e Either Low or High Logic Level
e Positive pulse data The J and K inputs must be held constant while the clock .
SN5476, SN54LS76A SN7476, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR SDLS121 – DECEMBER 1983 – REVISED MARCH 19.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | 5474 |
Texas Instruments |
Dual D-Type Positive-Edge-Triggered Flip-Flops | |
2 | 5474 |
National Semiconductor |
Dual Positive-Edge-Triggered Flip-Flops | |
3 | 547B |
Micro Commercial Components |
NPN Silicon Amplifier Transistor 625mW | |
4 | 5400 |
National Semiconductor |
Quad 2-Input NAND Gates | |
5 | 5402 |
National Semiconductor |
Quad 2-Input NOR Gates | |
6 | 5404 |
National Semiconductor |
Hex Inverting Gates | |
7 | 5404DMQB |
National Semiconductor |
Hex Inverting Gates | |
8 | 5404FMQB |
National Semiconductor |
Hex Inverting Gates | |
9 | 5406 |
Texas Instruments |
HEX INVERTER BUFFERS/DRIVERS | |
10 | 5406552-4 |
Tyco |
Modular Jacks | |
11 | 5406552-x |
Tyco |
Modular Jacks | |
12 | 5406AD |
IMO Electronics |
RECTANGULAR LED LAMP |