3256A - Lattice Semiconductor

3256A In-System Programmable High Density PLD

The ispLSI 3256A is a High-Density Programmable Logic Device containing 384 Registers, 128 Universal I/O pins, five Dedicated Clock Input Pins, eight Output Routing Pools (ORP) and a Global Routing Pool (GRP) which allows complete inter-connectivity between all of these elements. The ispLSI 3256A features 5V in-system programmability and in-system diagnostic.

Features

• HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 11000 PLD Gates — 384 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic
• HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable — Non-Volatile — 100% Tested at Time of Manufacture — Unused Product Term Shutdown Saves Power
• IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable (ISP™) using Lattice ISP.