74AUP1G07 |
Part Number | 74AUP1G07 |
Manufacturer | DIODES (https://www.diodes.com/) |
Description | The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. Pin Assignments The 74AUP1G07 is a single buffer-gate, with an ope... |
Features |
• Advanced Ultra Low Power (AUP) CMOS • Supply Voltage Range from 0.8V to 3.6V • 4 mA Output Drive at 3.0V • Low Static Power Consumption ICC < 0.9µA • Low Dynamic Power Consumption CPD = 6pF (Typical at 3.6V) • Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250 mV at VCC = 3.0V. • IOFF Supports Partial-Power-Down Mode Operation • ESD Protection Exceeds JESD 22 2000-V Human Body Model (A114) Exceeds 1000-V Charged Device Model (C101) • Latch-Up Exceeds 100mA per JESD 78, Class I • Leadless Packages Named per JESD... |
Document |
74AUP1G07 Data Sheet
PDF 349.59KB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
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1 | 74AUP1G00 |
NXP Semiconductors |
Low-power 2-input NAND gate | |
2 | 74AUP1G00 |
Diodes |
SINGLE 2 INPUT POSITIVE NAND GATE | |
3 | 74AUP1G00 |
nexperia |
Low-power 2-input NAND gate | |
4 | 74AUP1G00-Q100 |
nexperia |
Low-power 2-input NAND gate | |
5 | 74AUP1G02 |
NXP |
Low-power 2-input NOR gate |