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PI6C5930 |
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| Part Number | PI6C5930 |
| Manufacturer | Pericom Semiconductor |
| Description | The PI6C5930 clock driver uses a PLL (phase-locked loop) to reduce time skew between a reference clock input (SYNC) and the outputs. An internal loop filter eliminates the need for external compensati... |
| Features |
• Wide frequency range: 100 MHz max. • Five Q and one Q/2 outputs • Output skew < 250ps (rising edges) • Internal RC loop filter network • Low noise TTL-compatible outputs • Balanced drive outputs: +24mA • Outputs Hi-Z and registers reset when OE = LOW • PLL bypass for testing and low-frequency applications • Small footprint 20-pin QSOP package (Q) Description The PI6C5930 clock driver uses a PLL (phase-locked loop) to reduce time skew between a reference clock input (SYNC) and the outputs. An internal loop filter eliminates the need for external compensation. This driver generates six clock ... |
| Document |
 PI6C5930 Data Sheet
PDF 216.77KB |
| Distributor | Stock | Price | Buy |
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| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | PI6C5912006 |
Diodes |
6 Output LVPECL Fanout Buffer |
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| 2 | PI6C5912012 |
Diodes |
12 Output LVPECL Fanout Buffer |
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| 3 | PI6C5912016 |
Diodes |
16 Output LVPECL Fanout Buffer |
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| 4 | PI6C5912016-01 |
Diodes |
16 Output LVPECL Fanout Buffer |
|
| 5 | PI6C5913004 |
Pericom Semiconductor |
3 GHz 1:4 LVPECL Fanout Buffer |
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