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NS16550A |
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| Part Number | NS16550A |
| Manufacturer | National Semiconductor |
| Description | Files (ADFs) These files each have an I D number that associates each ADF with the matching adapter card I D number The ADF contains specific information used by the operator during system configurati... |
| Features |
regardless of the data bus width One of these is a centralized arbitration controller that allows up to 16 devices to contend for the 8 available DMA channels These devices compete based on an assigned priority level for the DMA resource A ‘‘fairness’’ option allows lower priority devices to compete successfully for a DMA channel even though higher priority devices may require a transfer If the fairness option is enabled each device that has received DMA service must wait until all other devices requesting the DMA have been serviced before they are allowed to compete for the DMA resource again... |
| Document |
 NS16550A Data Sheet
PDF 211.82KB |
| Distributor | Stock | Price | Buy |
|---|
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | NS16550A |
National Semiconductor |
UART Design and Application Considerations |
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| 2 | NS16550AF |
National Semiconductor |
UART |
|
| 3 | NS16552V |
National |
Dual Universal Asynchronous Receiver/Transmitter with FIFOs |
|
| 4 | NS16450 |
National Semiconductor |
Universal Asynchronous Receiver/Transmitter |
|
| 5 | NS16C2552 |
ETCTI |
NS16C2552/2752 Dual UART w/ 16-byte/64-byte FIFO and up to 5 Mbit/s Data Rate (Rev. D) |
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