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ICS543 |
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| Part Number | ICS543 |
| Manufacturer | ICST |
| Description | The ICS543 is a cost effective way to produce a high quality clock output divided from a clock input. The chip accepts a clock input up to 90 MHz at 5.0 V, and by using proprietary Phase Locked Loop (... |
| Features |
• Packaged in 8 pin SOIC • Low cost clock divider and 2X multiplier • Low skew (500ps) outputs. One is ÷ 2 of other. • Easy to use with other generators and buffers • Input clock frequency up to 90 MHz at 5 V • Output clock duty cycle of 45/55 • Power Down turns off chip • Output Enable • Full CMOS clock swings with 25 mA drive capability at TTL levels • Advanced, low power CMOS process • Operating voltages of 3.0 to 5.5 V Block Diagram VDD GND 2 S1, S0 Divider and Selection Circuitry Input Clock ÷2 Output Buffer CLK Output Buffer CLK/2 OE (both outputs) 1 Revision 010599 Printed 12/4/... |
| Document |
 ICS543 Data Sheet
PDF 78.55KB |
| Distributor | Stock | Price | Buy |
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