CLA70000 Zarlink Semiconductor High Density CMOS Gate Arrays Datasheet, en stock, prix

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CLA70000

Zarlink Semiconductor
CLA70000
CLA70000 CLA70000
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Part Number CLA70000
Manufacturer Zarlink Semiconductor
Description ( DataSheet : www.DataSheet4U.com ) CLA70000 Series High Density CMOS Gate Arrays DS2462 ISSUE 3.1 March 1992 Recent advances in CMOS processing technology and improvements in design architecture...
Features



• Low power channelless arrays from 5,000 to 250,000 available gates (5µ W / gate / MHz) 1 micron (0.8 micron effective) twin well epitaxial process Typical gate delays of 400 ps (NAND2 , Fanout=2) Comprehensive cell library including DSP, JTAG/BIST and compiled memory cells (ROM blocks to 64K bits and RAM blocks to 16K bits) Extensive Range of Plastic and Ceramic Packages for both Surface Mount and Through Board Assembly Flexible I/O structure allows user to define power pad locations Fully supported on industry standard workstations and in-house software High drive output stages with s...

Document Datasheet CLA70000 Data Sheet
PDF 188.90KB
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