PEF20571 |
Part Number | PEF20571 |
Manufacturer | Infineon (https://www.infineon.com/) Technologies AG |
Description | in the “DELIC-LC PEB 20570/DELIC-PB PEB 20571 Data Sheet, Version 3.1” but extends the operating conditions to the extended temperature range of -40°C to +85°C. The ordering code is: Table 2 Device Na... |
Features |
C Clock System Synchronization” 1.1 Clocking the VIP in LT-T Mode by DELIC Layer 1 Clock
1 6 .3 8 4 M H z
DCXO
8 kH z PD MUX R EFCLK D ivid e r XCLK
1 6 .3 8 4 M H z PLL D ivid e r
D ivid e r 1 5 .3 6 M H z IN C L K OSC /1 0 C e n tra l O ffice R xP L L M ux VIP
DELIC L1_CLK
1 .5 3 6 M H z
REFCLK
DELIC _refclk1
Figure 1
Clocking the VIP by using DELIC Layer 1 Clock
When the Central Office is activated, its clock signal is retrieved by the RxPLL of the VIP and a 1.536 MHz reference signal is generated and used as input signal for the DELIC DCXO (pin XCLK). This signal is divided down... |
Document |
PEF20571 Data Sheet
PDF 194.65KB |
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