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SN74LV74A-Q1 |
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| Part Number | SN74LV74A-Q1 |
| Manufacturer | Texas Instruments (https://www.ti.com/) |
| Description | ordering informationS This dual positive-edge-triggered D-type flip-flop is designed for 2-V to 5.5-V VCC operation. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, r... |
| Features |
inputs. When PRE and CLR are inactive (high), data at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is pow... |
| Document |
 SN74LV74A-Q1 Data Sheet
PDF 871.75KB |
| Distributor | Stock | Price | Buy |
|---|
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | SN74LV74A-EP |
Texas Instruments |
Dual Positive-Edge-Triggered D-Type Flip-Flop |
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| 2 | SN74LV74A |
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Dual Positive-Edge-Triggered D-Type Flip-Flop |
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| 3 | SN74LV00A |
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Quadruple 2-Input Positive-NAND Gates |
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| 4 | SN74LV02A |
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| 5 | SN74LV04A |
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