M13S64164A-6BG |
Part Number | M13S64164A-6BG |
Manufacturer | ESMT |
Description | ESMT M13S64164A DDR SDRAM 1M x 16 Bit x 4 Banks Double Data Rate SDRAM Features z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directiona... |
Features |
z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directional data strobe (DQS) z On-chip DLL z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition z Quad bank operation z CAS Latency : 2, 2.5, 3 z Burst Type : Sequential and Interleave z Burst Length : 2, 4, 8 z All inputs except data & DM are sampled at the rising edge of the system clock(CLK) z Data I/O transitions on both edges of data strobe (DQS) z DQS is edge-aligned with data for reads; center-aligned with data for WRITE z Data mask (DM)... |
Document |
M13S64164A-6BG Data Sheet
PDF 1.51MB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
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1 | M13S64164A-6BG2Y |
ESMT |
1M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
2 | M13S64164A-6TG |
ESMT |
1M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
3 | M13S64164A-6TG2Y |
ESMT |
1M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
4 | M13S64164A-4BG2Y |
ESMT |
1M x 16 Bit x 4 Banks Double Data Rate SDRAM | |
5 | M13S64164A-4TG2Y |
ESMT |
1M x 16 Bit x 4 Banks Double Data Rate SDRAM |