74HCT138 |
Part Number | 74HCT138 |
Manufacturer | nexperia (https://www.nexperia.com/) |
Description | The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output... |
Features |
• Wide supply voltage range from 2.0 to 6.0 V • CMOS low power dissipation • High noise immunity • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Active LOW mutually exclusive outputs • Input levels: • For 74HC138: CMOS level • For 74HCT138: TTL level • Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) • JESD7A (2.0 V to 6.0 V) • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Multiple package options • Specified from -40... |
Document |
74HCT138 Data Sheet
PDF 269.86KB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
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1 | 74HCT132 |
NXP |
Quad 2-input NAND Schmitt trigger | |
2 | 74HCT132 |
nexperia |
Quad 2-input NAND Schmitt trigger | |
3 | 74HCT132-Q100 |
nexperia |
Quad 2-input NAND Schmitt trigger | |
4 | 74HCT132A |
ON Semiconductor |
Quad 2-Input NAND Gate | |
5 | 74HCT132D |
nexperia |
Quad 2-input NAND Schmitt trigger |