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54LS114 |
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| Part Number | 54LS114 |
| Manufacturer | National Semiconductor |
| Description | The ’LS114 features individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inpu... |
| Features |
individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inputs may be allowed to change
when the Clock Pulse is HIGH and the bistable will perform according to the truth table as long as the minimum setup times are observed Input data is transferred to the outputs on the negative-going edge of the clock pulse
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 10176 – 1 Order Number 54LS114DMQB 54LS114FMQB or 54LS114LMQB See NS Package Number E20A J14A or W14B VCC ... |
| Document |
 54LS114 Data Sheet
PDF 98.18KB |
| Distributor | Stock | Price | Buy |
|---|
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | 54LS11 |
National Semiconductor |
Triple 3-Input AND Gates |
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| 2 | 54LS10 |
National Semiconductor |
Triple 3-Input NAND Gates |
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| 3 | 54LS109 |
National Semiconductor |
Dual Positive-Edge-Triggered J-K Flip-Flops |
|
| 4 | 54LS109A |
Texas Instruments |
Dual J-K Positive-Edge-Triggered Flip-Flops |
|
| 5 | 54LS122 |
Texas Instruments |
RETRIGGERABLE MONOSTABLE MULTIVIBRATORS |
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