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CY7C1423KV18 |
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| Part Number | CY7C1423KV18 |
| Manufacturer | Cypress Semiconductor |
| Description | CY7C1423KV18/CY7C1424KV18 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture 36-Mbit DDR II SIO SRAM Two-Word Burst Architecture Features ■ 36-Mbit density (2M × 18, 1M × 36) ■ 333 MHz clock for hig... |
| Features |
■ 36-Mbit density (2M × 18, 1M × 36) ■ 333 MHz clock for high bandwidth ■ Two-word burst for reducing address bus frequency ■ Double data rate (DDR) interfaces (data transferred at 666 MHz) at 333 MHz ■ Two input clocks (K and K) for precise DDR timing ❐ SRAM uses rising edges only ■ Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches ■ Echo clocks (CQ and CQ) simplify data capture in high speed systems ■ Synchronous internally self timed writes ■ DDR II operates with 1.5 cycle read latency when DOFF is asserted HIGH ■ Operates similar to DDR I device w... |
| Document |
 CY7C1423KV18 Data Sheet
PDF 1.21MB |
| Distributor | Stock | Price | Buy |
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| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | CY7C1423AV18 |
Cypress Semiconductor |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
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| 2 | CY7C1423BV18 |
Cypress Semiconductor |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
|
| 3 | CY7C1423JV18 |
Cypress Semiconductor |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
|
| 4 | CY7C142 |
Cypress Semiconductor |
2K x 8 Dual-Port Static RAM |
|
| 5 | CY7C1420AV18 |
Cypress Semiconductor |
(CY7C14xxAV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture |
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