Recherchez avec le numéro de pièce ainsi que le fabricant ou la description
CY7C1307BV25 |
Click to view a larger image
| Part Number | CY7C1307BV25 |
| Manufacturer | Cypress Semiconductor |
| Description | • Separate independent Read and Write data ports • Supports concurrent transactions • 167-MHz clock for high bandwidth • 2.5 ns Clock-to-Valid access time • 4-Word Burst for reducing the address bus ... |
| Features |
Functional Description
• Separate independent Read and Write data ports • Supports concurrent transactions • 167-MHz clock for high bandwidth • 2.5 ns Clock-to-Valid access time • 4-Word Burst for reducing the address bus frequency • Double Data Rate (DDR) interfaces on both Read and Write Ports (data transferred at 333 MHz) @167 MHz • Two input clocks (K and K) for precise DDR timing • SRAM uses rising edges only • Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches. • Single multiplexed address input bus latches address inputs for both Read and Writ... |
| Document |
 CY7C1307BV25 Data Sheet
PDF 784.33KB |
| Distributor | Stock | Price | Buy |
|---|
| No. | Parte # | Fabricante | Descripción | Hoja de Datos |
|---|---|---|---|---|
| 1 | CY7C1307BV18 |
Cypress Semiconductor |
18-Mbit Burst of 4 Pipelined SRAM |
|
| 2 | CY7C130 |
Cypress Semiconductor |
1K x 8 Dual-Port Static RAM |
|
| 3 | CY7C1302CV25 |
Cypress Semiconductor |
9-Mbit Burst of Two Pipelined SRAMs |
|
| 4 | CY7C1302DV25 |
Cypress Semiconductor |
9-Mbit Burst of Two Pipelined SRAMs |
|
| 5 | CY7C1303BV18 |
Cypress Semiconductor |
18-Mbit Burst of 2 Pipelined SRAM |
|