IS61QDPB44M18A |
Part Number | IS61QDPB44M18A |
Manufacturer | ISSI |
Description | at page 6 for each ODT option. DESCRIPTION The 72Mb IS61QDPB42M36A/A1/A2 and IS61QDPB44M18A/A1/A2 are synchronous, highperformance CMOS static random access memory (SRAM) devices. These SRAMs have se... |
Features |
2Mx36 and 4Mx18 configuration available. On-chip Delay Locked Loop (DLL) for wide data valid window. Separate independent read and write ports with concurrent read and write operations. Synchronous pipeline read with late write operation. Double Data Rate (DDR) interface for read and write input ports. 2.5 cycle read latency. Fixed 4-bit burst for read and write operations. Clock stop support. Two input clocks (K and K#) for address and control registering at rising edges only. Two echo clocks (CQ and CQ#) that are delivered simultaneously with data. Data Valid Pin (QVLD)... |
Document |
IS61QDPB44M18A Data Sheet
PDF 698.51KB |
Distributor | Stock | Price | Buy |
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No. | Parte # | Fabricante | Descripción | Hoja de Datos |
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1 | IS61QDPB44M18 |
ISSI |
QUADP (Burst of 4) Synchronous SRAMs | |
2 | IS61QDPB44M18A1 |
ISSI |
72Mb QUADP (Burst 4) SYNCHRONOUS SRAM | |
3 | IS61QDPB44M18A2 |
ISSI |
72Mb QUADP (Burst 4) SYNCHRONOUS SRAM | |
4 | IS61QDPB44M18B |
ISSI |
72Mb QUADP SYNCHRONOUS SRAM | |
5 | IS61QDPB44M18B1 |
ISSI |
72Mb QUADP SYNCHRONOUS SRAM |