डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
M13D64322A | Low Power DDR SDRAM ESMT
LPDDR SDRAM
Features
JEDEC Standard Internal pipelined double-data-rate architecture, two data access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized. Differential c |
ESMT |
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M13D64322A | Low Power DDR SDRAM | ESMT |
www.DataSheet.in | 2017 | संपर्क |