HD74LS273 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| HD74LS273 | Octal D-type Positive-edge-triggered Flip-Flops Unit: mm
24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89
1.27 Max
10 1.30 2.54 Min 5.08 Max 7.62
0.51 Min
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.11
Hitachi Code JEDEC EIAJ Weight (reference |
 Hitachi Semiconductor |
|
| HD74LS273 | Octal D-type Positive-edge-triggered Flip-Flops HD74LS273
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)
REJ03D0473–0300 Rev.3.00
Jul.15.2005
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type fli |
 Renesas |
|
| HD74LS273P | Octal D-type Positive-edge-triggered Flip-Flops HD74LS273
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)
REJ03D0473–0300 Rev.3.00
Jul.15.2005
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type fli |
Renesas |
शेयर लिंक :
[1]
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