HD74LS175 डाटा शीट PDF( Datasheet )

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.1

HD74LS174 / HD74LS175 Hex / Quadruple D-type Flip-Flops (with clear) REJ03D0451–0300 Rev.3.00 Jul.15.2005 These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic.

HD74LS174 / HD74LS175 Hex / Quadruple D-type Flip-Flops (with clear) REJ03D0451–0300 Rev.3.00 Jul.15.2005 These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic.