74LS77 डाटा शीट PDF( Datasheet )
डेटा पत्रक ( Datasheet PDF ) |
| भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
| 74LS77 | 4-BIT D LATCH LOW-POWER SCHOTTKY 4-BIT D LATCH
The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as temporary storage for binary information between processing units and input /output or indicator units. Information present at a dat |
 Motorola |
|
| 74LS74 | Dual Positive-Edge-Triggered D Flip-Flops |  Fairchild Semiconductor |
|
| 74LS74 | LOW-POWER SCHOTTKY |  ON Semiconductor |
|
| 74LS76 | Dual J-K Flip-Flop |  Hitachi Semiconductor |
|
| 74LS76 | DUAL JK FLIP-FLOP |  ETC |
|
| 74LS76 | Dual JK Flip-Flop | ON Semiconductor |
|
| 74LS74 | Dual D-type Positive Edge-triggered Flip-Flops | Hitachi Semiconductor |
|
| 74LS74 | DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP | Motorola |
|
| 74LS74 | Dual Positive-Edge-Triggered D Flip-Flops |  National Semiconductor |
|
| 74LS73 | Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops | Fairchild Semiconductor |
|
| 74LS76A | DUAL JK FLIP-FLOP | Motorola |
शेयर लिंक :
[1]
www.DataSheet.in | 2017 | संपर्क |