डेटा पत्रक ( Datasheet PDF ) |
भाग संख्या | विवरण | मैन्युफैक्चरर्स | |
74AUP2G34 | DUAL BUFFERS ADAVDAVANCNECDE ID INFNFORORMAMTAITIOONN
74AUP2G34
DUAL BUFFERS
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
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Diodes |
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74AUP2G34 | Low-power dual buffer 74AUP2G34
Low-power dual buffer
Rev. 6 — 17 September 2015
Product data sheet
1. General description
The 74AUP2G34 provides two low-power, low-voltage buffers.
Schmitt trigger action at all inputs makes the |
NXP |
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74AUP2G34 | Low-power dual buffer 74AUP2G34
Low-power dual buffer
Rev. 8 — 31 January 2022
Product data sheet
1. General description
The 74AUP2G34 is a dual buffer. Schmitt-trigger action at all inputs makes the circuit tolerant of slower i |
nexperia |
|
74AUP2G3404 | BUFFER AND INVERTER 74AUP2G3404
BUFFER AND INVERTER
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G3404 has one buffer and |
Diodes |
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74AUP2G3404 | Low-power buffer and inverter 74AUP2G3404
Low-power buffer and inverter
Rev. 3 — 31 January 2022
Product data sheet
1. General description
The 74AUP2G3404 is a single buffer and single inverter.
Schmitt trigger action at all inputs make |
nexperia |
|
74AUP2G3407 | Low-power single buffer 74AUP2G3407
Low-power single buffer; single buffer with open-drain
Rev. 3 — 10 February 2022
Product data sheet
1. General description
The 74AUP2G3407 is a single buffer and a single buffer with open-drai |
nexperia |
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