74AUP1G17 डाटा शीट PDF( Datasheet )

www.DataSheet4U.com 74AUP1G17 Low-power Schmitt-trigger buffer Rev. 01 — 26 July 2005 Product data sheet 1. General description The 74AUP1G17 is a high-performance, low-power, low-voltage, Si-gate CMOS devi

74AUP1G17 SINGLE SCHMITT-TRIGGER BUFFER Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. Pin Assignments The AUP1

74AUP1G17 Low-power Schmitt trigger Rev. 13 — 13 January 2022 Product data sheet 1. General description The 74AUP1G17 is a single buffer with Schmitt-trigger input. This device ensures very low static and d

www.DataSheet4U.com 74AUP1G175 Low-power D-type flip-flop with reset; positive-edge trigger Rev. 01 — 15 November 2006 Product data sheet 1. General description The 74AUP1G175 is a high-performance, low-p

74AUP1G175 Low-power D-type flip-flop with reset; positive-edge trigger Rev. 7 — 18 January 2022 Product data sheet 1. General description The 74AUP1G175 is a single positive edge triggered D-type flip-fl

74AUP1G175-Q100 Low-power D-type flip-flop with reset; positive-edge trigger Rev. 4 — 18 January 2022 Product data sheet 1. General description The 74AUP1G175 is a single positive edge triggered D-type fl