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CAV24C128 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - EEPROM - ON Semiconductor

भाग संख्या CAV24C128
समारोह EEPROM
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<?=CAV24C128?> डेटा पत्रक पीडीएफ

CAV24C128 pdf
CAV24C128
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
Storage Temperature
65 to +150
°C
Voltage on Any Pin with Respect to Ground (Note 1)
0.5 to +6.5
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
Min Units
NEND (Notes 3, 4) Endurance
1,000,000
Program / Erase Cycles
TDR Data Retention
100 Years
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, VCC = 5 V, 25°C
4. This device uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte
has to be written, 4 bytes (including the ECC bits) are reprogrammed. It is recommended to write by multiple of 4 bytes in order to benefit
from the maximum number of write cycles.
Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specied.)
Symbol
Parameter
Test Conditions
Min Max Units
ICCR
ICCW
ISB
IL
VIL
VIH
VOL
Read Current
Write Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Read, fSCL = 400 kHz/1 MHz
All I/O Pins at GND or VCC
Pin at GND or VCC
IOL = 3.0 mA
TA = 40°C to +125°C
TA = 40°C to +125°C
0.5
0.7 VCC
1
3
5
2
0.3 VCC
VCC + 0.5
0.4
mA
mA
mA
mA
V
V
V
Table 4. PIN IMPEDANCE CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specied.)
Symbol
Parameter
Conditions
Max Units
CIN (Note 5)
SDA I/O Pin Capacitance
VIN = 0 V
8 pF
CIN (Note 5)
Input Capacitance (other pins)
VIN = 0 V
6 pF
IWP, IA (Note 6)
WP Input Current, Address Input
Current (A0, A1, A2)
VIN < VIH, VCC = 5.5 V
VIN < VIH, VCC = 3.3 V
75 mA
50
VIN > VIH
2
5. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
6. When not driven, the WP, A0, A1, A2 pins are pulled down to GND internally. For improved noise immunity, the internal pulldown is relatively
strong; therefore the external driver must be able to supply the pulldown current when attempting to drive the input HIGH. To conserve power,
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pulldown reverts to a weak current source.
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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
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