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ISL8489E डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - +-15kV ESD Protected 5V Low Power - Intersil Corporation

भाग संख्या ISL8489E
समारोह +-15kV ESD Protected 5V Low Power
मैन्युफैक्चरर्स Intersil Corporation 
लोगो Intersil Corporation लोगो 
पूर्व दर्शन
1 Page
		
<?=ISL8489E?> डेटा पत्रक पीडीएफ

ISL8489E pdf
ISL8488E, ISL8489E, ISL8490E, ISL8491E
Pinouts
ISL8488E, ISL8490E
(8 LD SOIC)
TOP VIEW
VCC 1
RO 2
DI 3
GND 4
R
D
8A
7B
6Z
5Y
ISL8489E, ISL8491E
(14 LD SOIC)
TOP VIEW
NC 1
RO 2
RE 3
DE 4
DI 5
GND 6
GND 7
R
D
14 VCC
13 NC
12 A
11 B
10 Z
9Y
8 NC
Ordering Information www.DataSheet4U.com
PART
NUMBER
(Note 1)
PART
TEMP.
PKG.
MARKING RANGE (°C) PACKAGE DWG. #
ISL8488EIB 8488 EIB
-40 to +85 8 Ld SOIC M8.15
ISL8488EIBZA 8488 EIBZ
(Note 2)
-40 to +85 8 Ld SOIC M8.15
(Pb-free)
ISL8489EIB ISL8489EIB -40 to +85 14 Ld SOIC M14.15
ISL8489EIBZ 8489EIBZ
(Note 2)
-40 to +85 14 Ld SOIC M14.15
(Pb-free)
ISL8490EIBZ 8490E IBZ
(Note 2)
-40 to +85 8 Ld SOIC M8.15
(Pb-free)
ISL8491EIB ISL8491EIB -40 to +85 14 Ld SOIC M14.15
ISL8491EIBZ 8491EIBZ
(Note 2)
-40 to +85 14 Ld SOIC M14.15
(Pb-free)
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
2. Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
Truth Tables (For ISL8488E, ISL8490E, only the DE = 1 and RE = 0 entries are valid)
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
OUTPUT
RE DE
DI
Z
Y
RE DE A-B RO
X1101
0 X +0.2V 1
X1010
0 X -0.2V 0
X
0
X
High-Z
High-Z
0 X Inputs Open 1
Pin Descriptions
1 X X High-Z
PIN FUNCTION
RO Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).
RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
DI Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND Ground connection.
A ±15kV HBM ESD Protected, Non-inverting receiver input.
B ±15kV HBM ESD Protected, Inverting receiver input.
Y ±15kV HBM ESD Protected, Non-inverting driver output.
Z ±15kV HBM ESD Protected, Inverting driver output.
VCC System power supply input (4.5V to 5.5V).
NC No Connection.
2 FN6073.4
July 26, 2007

विन्यास 13 पेज
डाउनलोड[ ISL8489E Datasheet.PDF ]


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