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IDT74ALVCH16721 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - 3.3V CMOS 20-BIT FLIP-FLOP - Integrated Device Technology

भाग संख्या IDT74ALVCH16721
समारोह 3.3V CMOS 20-BIT FLIP-FLOP
मैन्युफैक्चरर्स Integrated Device Technology 
लोगो Integrated Device Technology लोगो 
पूर्व दर्शन
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IDT74ALVCH16721 pdf
IDT74ALVCH16721
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
PIN CONFIGURATION
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OE
Q1
Q2
GND
Q3
Q4
VCC
Q5
Q6
Q7
GND
Q8
Q9
Q10
Q11
Q12
Q13
GND
Q14
Q15
Q16
VCC
Q17
Q18
GND
Q19
Q20
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56 CLK
55 D1
54 D2
53 GND
52 D3
51 D4
50 VCC
49 D5
48 D6
47 D7
46 GND
45 D8
44 D9
43 D10
42 D11
41 D12
40 D13
39 GND
38 D14
37 D15
36 D16
35 VCC
34 D17
33 D18
32 GND
31 D19
30 D20
29 CLKEN
SSOP/ TSSOP
TOP VIEW
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Description
Max
VTERM(2) Terminal Voltage with Respect to GND –0.5 to +4.6
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5
TSTG Storage Temperature
–65 to +150
IOUT DC Output Current
–50 to +50
IIK Continuous Clamp Current,
VI < 0 or VI > VCC
±50
IOK Continuous Clamp Current, VO < 0
–50
ICC Continuous Current through each
ISS VCC or GND
±100
Unit
V
V
°C
mA
mA
mA
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 5 7 pF
COUT
Output Capacitance VOUT = 0V
7
9 pF
CI/O I/O Port Capacitance VIN = 0V 7 9 pF
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
OE
Dx
Qx
CLK
CLKEN
NC
Description
3–State Output Enable Input (Active LOW)
Data Inputs(1)
3-State Outputs
Clock Input
Clock Enable Input (Active LOW)
No Internal Connection
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE (EACH FLIP-FLOP)(1)
Inputs
OE CLKEN CLK
Dx
LH
XX
L L H
L L L
L
L
L or H
X
H X XX
Output
Qx
Q0(2)
H
L
Q0(2)
Z
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
= LOW-to-HIGH transition
2. Output level before the indicated steady-state input conditions were established.
2

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