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FDMB506P डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - P-Channel 1.8V Logic Level PowerTrench MOSFET - Fairchild Semiconductor

भाग संख्या FDMB506P
समारोह P-Channel 1.8V Logic Level PowerTrench MOSFET
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
1 Page
		
<?=FDMB506P?> डेटा पत्रक पीडीएफ

FDMB506P pdf
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS Gate–Body Leakage
VGS = 0 V,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VDS = –16 V,
VGS = ± 8 V,
VGS = 0 V
VDS = 0 V
–20
–13
V
mV/°C
–1
±100
µA
nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
gFS Forward Transconductance
VDS = VGS,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
VGS = –4.5 V, ID = –6.8 A
VGS = –2.5 V, ID = –2.5 A
VGS = –1.8 V, ID = –1.8 A
VGS= –4.5 V, ID = –6.8 A, TJ=125°C
VDS = –5 V, ID = –6.8 A
–0.4 –0.7 –1.5
V
3 mV/°C
25 30
30 38
40 70
36 44
26
m
S
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
VDS = –10 V, V GS = 0 V,
f = 1.0 MHz
2216
351
167
2960
470
260
pF
pF
pF
Switching Characteristics
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
(Note 2)
VDD = –10 V, ID = –1 A,
VGS = –4.5 V, RGEN = 6
VDS = –10 V, ID = –6.8 A,
VGS = –4.5 V
14 25
8 16
175 280
80 128
21 30
3.5
4.5
ns
ns
ns
ns
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V,
IS = –0.8 A(Note 2)
Voltage
trr
Diode Reverse Recovery Time
IF = –6.8 A,
Qrr Diode Reverse Recovery Charge diF/dt = 100 A/µs
1.6
–0.6 –1.2
26 48
12 22
A
V
nS
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 160°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDMB506P Rev C1(W)

विन्यास 6 पेज
डाउनलोड[ FDMB506P Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
FDMB506PP-Channel 1.8V Logic Level PowerTrench MOSFETFairchild Semiconductor
Fairchild Semiconductor


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