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FDMB668P डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - P-Channel 1.8V Logic Level PowerTrench MOSFET - Fairchild Semiconductor

भाग संख्या FDMB668P
समारोह P-Channel 1.8V Logic Level PowerTrench MOSFET
मैन्युफैक्चरर्स Fairchild Semiconductor 
लोगो Fairchild Semiconductor लोगो 
पूर्व दर्शन
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<?=FDMB668P?> डेटा पत्रक पीडीएफ

FDMB668P pdf
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
BVDSS
TJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250µA, VGS = 0V
ID = -250µA, referenced to 25°C
VDS = -16V, VGS = 0V
VGS = ±8V, VDS = 0V
-20 V
-11.4
mV/°C
-1
±100
µA
nA
On Characteristics (Note 2)
VGS(th)
VGS(th)
TJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = -250µA
-0.4 -0.6 -1.0
V
ID = -250µA, referenced to 25°C
2.8 mV/°C
VGS = -4.5V, ID = -6.1A
VGS = -2.5V, ID = -5.1A
VGS = -1.8V, ID = -4.3A
VGS = -4.5V, ID = -6.1A,TJ = 125°C
VDS = -4.5V, ID = -6.1A
22 35
27
35
50
70
m
31 50
27 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10V, VGS = 0V,
f = 1MHz
1565
210
175
2085
280
265
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = -10V, ID = -6.1A
VGS = -4.5V, RGEN = 6
VGS = 0V to -10V
VGS = 0V to -5V
VDD = -10V
ID = -6.1A
7 14
9 18
176 282
84 135
42 59
22 31
3
5
ns
ns
ns
ns
nC
nC
nC
nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage VGS = 0V, IS = -1.6A (Note 2)
-0.7 -1.2
V
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -6.1A, di/dt = 100A/µs
29 44 ns
15 23 nC
Notes:
1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
a) 65°C/W when mounted on a
1in2 pad of 2 oz copper
b) 165°C/W when mounted on a
minimum pad .
2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2%.
FDMB668P Rev.B
2 www.fairchildsemi.com

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डाउनलोड[ FDMB668P Datasheet.PDF ]


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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
FDMB668PP-Channel 1.8V Logic Level PowerTrench MOSFETFairchild Semiconductor
Fairchild Semiconductor


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