UPD77P25 डेटा पत्रक PDF( Datasheet डाउनलोड )

डेटा पत्रक - Digital Signal Processor - NEC Electronics

भाग संख्या UPD77P25
समारोह Digital Signal Processor
मैन्युफैक्चरर्स NEC Electronics 
लोगो NEC Electronics लोगो 
पूर्व दर्शन
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<?=UPD77P25?> डेटा पत्रक पीडीएफ

UPD77P25 pdf
The uP077C25/uP077P25 signal processing interface (SPI) chips are significant upgrades to the uP07720 - the
original member of NEC's family of digital signal processors. Oesignated the "SPI PLUS" (SPI+), these chips
execute instructions twice as fast as the 7720/77C20. Additional instructions allow the SPI+ to execute common
digital filter routines more efficiently and hence at more than twice the speed of a 7720 implementation.
1n addition to doubled execution speed, the SPI+ has four times the .instruction ROM space anel twice the data ROM
and RAM space of the n20. Real savings are now possible especially where one nC25 can do the wori< of - and
replace two or more 7720s.
The externai clock frequency (8.3 MHz maximum) remains the same as for n20/77C20 while the internai instruction
-execution speed is doubled. For most applications, the 77C25177P25 is plug-in compatible with the
The feature that distinguishes digital signal processing (OSP) chips from general-purpose microcomputers is the on-
chip multiplier • necessary for high speed signal processing algorithms. The SPI+ multiplier is very sophisticated -
especially for a Iow-cost OSP chip • since both multiplier inputs can be Ioaded simultaneously from two separate
memory areas. These Ioading operations are only two of nine operations (see 'Features') that can occur during one
122 ns instruction cycle. (On competitive OSP chips such operations raquire separata instructions). For a typical
DSP filter application involving many successive multiplications, the SPI+ provides a new multiplication product for
addition to a sum of products every 122 nanoseconds. Additionally, during the same instruction, memory data
~pojnters are manipulated, and even a retum from subroutine may be executado
The uP077C25 is the mask ROM version, and uPOnp25 is the UVEPROM version. Both versions are CMOS
and functionally identical.
See table 1 for detailed comparison of features between 77C25 and 77C20A.
nLow-power CMOS: approximately 24 mA typical current use (77C25).
n Fast instruction execution: 122 ns with 8.192 MHz clock.
nAli instructions execute in one instruction cycle
[] Crop-in compatible with uPOn20Al77C20Al77P20
n16-bit data word
n Multi-operation instructions for fast program execution:
- Load one muttiplier input
•• Load the other multiplier input
- Mulitply (automatic)
- Load product to output registers (automatic)
-- Add product to accumulator
- Move RAM column data painter
-- Move RAM row pointer
-- Move data ROM pointer
- Return from subrountine
• Any part, any combination, or ali 9 of the above operations may constitute one instruction which executes in 122 ns

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डाउनलोड[ UPD77P25 Datasheet.PDF ]

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अनुशंसा डेटापत्रक

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