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74LVC1GU04 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Inverter - NXP

भाग संख्या 74LVC1GU04
समारोह Inverter
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
1 Page
		
<?=74LVC1GU04?> डेटा पत्रक पीडीएफ

74LVC1GU04 pdf
Philips Semiconductors
Inverter
Product specification
74LVC1GU04
FEATURES
Wide supply voltage range from 1.65 to 5.5 V
High noise immunity
Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V).
• ±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Input accepts voltages up to 5 V
SOT353 package.
DESCRIPTION
The 74LVC1GU04 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
The input can be driven from either 3.3 or 5 V devices.
This feature allows the use of this device in a mixed
3.3 and 5 V environment.
The 74LVC1GU04 provides the inverting single state
unbuffered function.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf 2.5 ns.
SYMBOL
tPHL/tPLH
CI
CPD
PARAMETER
CONDITIONS
propagation delay A to Y
input capacitance
VCC = 1.8 V; CL = 30 pF; RL = 1 k
VCC = 2.5 V; CL = 30 pF; RL = 500
VCC = 3.3 V; CL = 50 pF; RL = 500
VCC = 5.0 V; CL = 50 pF; RL = 500
power dissipation capacitance per buffer notes 1 and 2
TYPICAL UNIT
1.7 ns
1.3 ns
1.6 ns
1.3 ns
6 pF
14.9 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
FUNCTION TABLE
See note 1.
INPUT
A
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
OUTPUT
Y
H
L
2001 Apr 06
2

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डाउनलोड[ 74LVC1GU04 Datasheet.PDF ]


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