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74LVC1G66 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Bilateral switch - NXP

भाग संख्या 74LVC1G66
समारोह Bilateral switch
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
1 Page
		
<?=74LVC1G66?> डेटा पत्रक पीडीएफ

74LVC1G66 pdf
Philips Semiconductors
Bilateral switch
Product specification
74LVC1G66
FEATURES
Very low ON resistance:
– 10 (typical) at VCC = 2.7 V
– 8 (typical) at VCC = 3.3 V
– 6 (typical) at VCC = 5 V.
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
High noise immunity
CMOS low power consumption
Latch up performance exceeds 250 mA
SOT353 package
Direct interface TTL-levels.
DESCRIPTION
The 74LVC1G66 is a high-speed Si-gate CMOS device.
The 74LVC1G66 provides an analog switch. The switch
has two input/output pins (Y and Z) and an active HIGH
enable input pin (E). When pin E is LOW, the analog
switch is turned off.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL
PARAMETER
tPZH/tPZL
turn-on time E to Vos
tPHZ/tPLZ
turn-off time E to Vos
CI input capacitance
CPD power dissipation capacitance
CS switch capacitance
CONDITIONS
CL = 50 pF; RL = 500 ; VCC = 3 V
CL = 50 pF; RL = 500 ; VCC = 5 V
CL = 50 pF; RL = 500 ; VCC = 3 V
CL = 50 pF; RL = 500 ; VCC = 5 V
CL = 50 pF; f = 10 MHz;
VCC = 3.3 V; notes 1 and 2
OFF-state
ON-state
TYPICAL
2.6
1.9
3.4
2.5
2
16
5
9.5
UNIT
ns
ns
ns
ns
pF
pF
pF
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL + CS) × VCC2 × fo where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = max. switch capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
2001 Oct 30
2

विन्यास 24 पेज
डाउनलोड[ 74LVC1G66 Datasheet.PDF ]


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