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TDA8366 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - I2C-bus controlled PAL/NTSC TV processor - NXP

भाग संख्या TDA8366
समारोह I2C-bus controlled PAL/NTSC TV processor
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
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<?=TDA8366?> डेटा पत्रक पीडीएफ

TDA8366 pdf
Philips Semiconductors
I2C-bus controlled PAL/NTSC TV
processor
Objective specification
TDA8366
FEATURES
Multistandard vision IF circuit (positive and
negative modulation)
Video identification circuit in the IF circuit which is
independent of the synchronization for stable On Screen
Display (OSD) under ‘no-signal’ conditions
Source selection with 2 Colour Video Blanking
Synchronization (CVBS) inputs and a Y/C (or extra
CVBS) input
Output signals of the video switch circuit for the teletext
decoder and a Picture-In-Picture (PIP) processor
Integrated chrominance trap and bandpass filters
(automatically calibrated)
Integrated luminance delay line
Asymmetrical peaking in the luminance channel with a
(defeatable) noise coring function
PAL/NTSC colour decoder with automatic search
system
Easy interfacing with the TDA8395 (SECAM decoder)
for multistandard applications
RGB control circuit with black-current stabilization and
white point adjustment; to obtain a good grey scale
tracking the black-current ratio of the 3 guns depends on
the white point adjustment
Linear RGB inputs and fast blanking
Horizontal synchronization with two control loops and
alignment-free horizontal oscillator
Vertical count-down circuit
Geometry correction by means of modulation of the
vertical and EW drive
I2C-bus control of various functions
Low dissipation (850 mW)
Small amount of peripheral components compared with
competition ICs
Only one adjustment (vision IF demodulator)
Y, U and V inputs and outputs.
GENERAL DESCRIPTION
The TDA8366 is an I2C-bus controlled PAL/NTSC TV
processor. The circuit has been designed for use with the
baseband chrominance delay line TDA4665 and for
DC-coupled vertical and East-West (EW) output stages.
The device can process both CVBS and Y/C input signals
and has a linear RGB-input with fast blanking.
The peaking circuit generates asymmetrical overshoots
(the amplitude of the ‘black’ overshoots is approximately
2 times higher as the one of the ‘white’ overshoots) and
contains a (defeatable) coring function.
The RGB control circuit contains a black-current stabilizer
circuit with internal clamp capacitors. The white point of the
picture tube is adjusted via the I2C-bus.
The deflection control circuit provides a drive pulse for the
horizontal output stage, a differential sawtooth current for
the vertical output stage and an East-West drive current for
the East-West output stage.These signals can be
manipulated for geometry correction of the picture.
The supply voltage for the IC is 8 V. The IC is available in
an SDIP package with 52 pins and in a QFP package with
64 pins (see Chapter “Ordering information”).
The pin numbers indicated in this document are
referenced to the SDIP52; SOT247-1 package; unless
otherwise indicated.
January 1995
2

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