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TDA8358J डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier - NXP

भाग संख्या TDA8358J
समारोह Full bridge vertical deflection output circuit in LVDMOS with east-west amplifier
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
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TDA8358J pdf
Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
Product specification
TDA8358J
FEATURES
Few external components required
High efficiency fully DC coupled vertical bridge output
circuit
Vertical flyback switch with short rise and fall times
Built-in guard circuit
Thermal protection circuit
Improved EMC performance due to differential inputs
East-west output stage.
GENERAL DESCRIPTION
The TDA8358J is a power circuit for use in 90° and 110°
colour deflection systems for 25 to 200 Hz field
frequencies, and for 4 : 3 and 16 : 9 picture tubes. The IC
contains a vertical deflection output circuit, operating as a
high efficiency class G system. The full bridge output
circuit allows DC coupling of the deflection coil in
combination with single positive supply voltages.
The east-west output stage is able to supply the sink
current for a diode modulator circuit.
The IC is constructed in a Low Voltage DMOS (LVDMOS)
process that combines bipolar, CMOS and DMOS
devices. DMOS transistors are used in the output stage
because of absence of second breakdown.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
Supplies
VP
VFB
Iq(P)(av)
Iq(FB)(av)
PEW
Ptot
supply voltage
flyback supply voltage
average quiescent supply current
average quiescent flyback supply current
east-west power dissipation
total power dissipation
Inputs and outputs
Vi(dif)(p-p)
Io(p-p)
differential input voltage (peak-to-peak value)
output current (peak-to-peak value)
Flyback switch
Io(peak)
maximum (peak) output current
East-west amplifier
Vo
VI(bias)
Io
output voltage
input bias voltage
output current
Thermal data; in accordance with IEC 747-1
Tstg
Tamb
Tj
storage temperature
ambient temperature
junction temperature
CONDITIONS MIN. TYP. MAX. UNIT
7.5 12 18 V
2VP 45 66 V
during scan
10 15 mA
during scan − − 10 mA
−−4W
− − 15 W
1000 1500 mV
− − 3.2 A
t 1.5 ms − − ±1.8 A
− − 68 V
2 3.2 V
− − 750 mA
55
25
−−
+150
+75
150
°C
°C
°C
1999 Dec 22
2

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भाग संख्याविवरणविनिर्माण
TDA8358JFull bridge vertical deflection output circuit in LVDMOS with east-west amplifierNXP
NXP


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