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TDA8351AQ डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - DC-coupled vertical deflection output circuit - NXP

भाग संख्या TDA8351AQ
समारोह DC-coupled vertical deflection output circuit
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
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<?=TDA8351AQ?> डेटा पत्रक पीडीएफ

TDA8351AQ pdf
Philips Semiconductors
DC-coupled vertical deflection output
circuit
Product specification
TDA8351AQ
FEATURES
Few external components
Highly efficient fully DC-coupled vertical output bridge
circuit
Vertical flyback switch
Guard circuit
Protection against:
– short-circuit of the output pins (9 and 5)
– short-circuit of the output pins to VP
Temperature protection
High EMC immunity because of common mode inputs
A guard signal in zoom mode.
GENERAL DESCRIPTION
The TDA8351A is a power circuit for use in 90° and 110°
colour deflection systems for field frequencies of 50 to
120 Hz. The circuit provides a DC driven vertical
deflection output circuit, operating as a highly efficient
class G system.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS MIN.
TYP.
MAX.
UNIT
DC supply
VP
Iq
Vertical circuit
supply voltage
quiescent supply current
9 16 25 V
30 mA
IO(p-p)
Idiff(p-p)
Vdiff(p-p)
output current
(peak-to-peak value)
differential input current
(peak-to-peak value)
differential input voltage
(peak-to-peak value)
−−3A
600 − µA
1.8 V
Flyback switch
IM
peak output current
t 1.5 ms
±1.5 A
VFB flyback supply voltage
− − 50 V
note 1
− − 60 V
Thermal data (in accordance with IEC 747-1)
Tstg
Tamb
Tvj
storage temperature
operating ambient temperature
virtual junction
55
25
−−
+150
+75
150
°C
°C
°C
Note
1. A flyback supply voltage of >50 V up to 60 V is allowed in application. A 220 nF capacitor in series with a 22 resistor
(depending on IO and the inductance of the coil) has to be connected between pin 9 and ground. The decoupling
capacitor of VFB has to be connected between pin 8 and pin 4. This supply voltage line must have a resistance of
33 (see application circuit Fig.5).
1999 Sep 27
2

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अनुशंसा डेटापत्रक

भाग संख्याविवरणविनिर्माण
TDA8351AQDC-coupled vertical deflection output circuitNXP
NXP


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