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SAA7121 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - Digital Video Encoder (ConDENC) - NXP

भाग संख्या SAA7121
समारोह Digital Video Encoder (ConDENC)
मैन्युफैक्चरर्स NXP 
लोगो NXP लोगो 
पूर्व दर्शन
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<?=SAA7121?> डेटा पत्रक पीडीएफ

SAA7121 pdf
Philips Semiconductors
Digital Video Encoder (ConDENC)
Preliminary specification
SAA7120; SAA7121
FEATURES
Monolithic CMOS 3.3 V (5 V) device
Digital PAL/NTSC encoder
System pixel frequency 13.5 MHz
Accepts MPEG decoded data on 8-bit wide input port;
input data format Cb-Y-Cr (CCIR 656), SAV and EAV
Three DACs for Y, C and CVBS, two times oversampled
with 10 bit resolution
Real time control of subcarrier
Cross colour reduction filter
Closed captioning encoding and WST- and
NABTS-Teletext encoding including sequencer and filter
Line 23 wide screen signalling encoding
Fast I2C-bus control port (400 kHz)
Encoder can be master or slave
Programmable horizontal and vertical input
synchronization phase
Programmable horizontal sync output phase
Internal colour bar generator (CBG)
2 × 2 bytes in lines 20 (NTSC) for copy guard
management system can be loaded via I2C-bus
Down-mode of DACs
Controlled rise/fall times of synchronization and
blanking output signals
Macrovision Pay-per-View copy protection system rev.7
and rev.6.1 as option.
This applies to SAA7120 only. The device is protected
by USA patent numbers 4631603, 4577216 and
4819098 and other intellectual property rights. Use of
the Macrovision anti-copy process in the device is
licensed for non-commercial home use only.
Reverse engineering or disassembly is prohibited.
Please contact your nearest Philips Semiconductors
sales office for more information.
QFP44 package.
GENERAL DESCRIPTION
The SAA7120; SAA7121 encodes digital YUV video data
to an NTSC or PAL CVBS or S-Video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
for example MPEG decoded data. It includes a sync/clock
generator and on-chip DACs.
QUICK REFERENCE DATA
SYMBOL
VDDA
VDDD
IDDA
IDDD
Vi
Vo(p-p)
RL
ILE
DLE
Tamb
PARAMETER
analog supply voltage
digital supply voltage
analog supply current
digital supply current
input signal voltage levels
analog output signal voltages Y, C, and CVBS without load
(peak-to-peak value)
load resistance
LF integral linearity error
LF differential linearity error
operating ambient temperature
MIN. TYP. MAX.
3.1 3.3 3.5
3.0 3.3 3.6
− − 62
− − 38
TTL compatible
1.2 1.35 1.45
UNIT
V
V
mA
mA
V
75
−−
−−
0
300
±3 LSB
±1 LSB
+70 °C
1997 Jan 06
2

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