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DAC1231 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - DAC1231/DAC1232 12-Bit/ mP Compatible/Double-Buffered D to A Converters - National Semiconductor

भाग संख्या DAC1231
समारोह DAC1231/DAC1232 12-Bit/ mP Compatible/Double-Buffered D to A Converters
मैन्युफैक्चरर्स National Semiconductor 
लोगो National Semiconductor लोगो 
पूर्व दर्शन
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<?=DAC1231?> डेटा पत्रक पीडीएफ

DAC1231 pdf
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
(Notes 1 and 2)
Supply Voltage (VCC)
Voltage at Any Digital Input
Voltage at VREF Input
Storage Temperature Range
17 VDC
VCC to GND
g25V
b65 C to a150 C
Package Dissipation at TAe25 C
(Note 3)
500 mW
DC Voltage Applied to IOUT1 or IOUT2
(Note 4)
ESD Susceptability
b100 mV to VCC
800V
Operating Conditions
Lead Temperature (Soldering 10 sec )
300 C
Temperature Range
DAC1208LCJ DAC1209LCJ
TMIN s TA s TMAX
DAC1210LCJ DAC1230LCJ
DAC1231LCJ DAC1232LCJ
DAC1231LIN DAC1232LIN
b40 C s TA s a85 C
DAC1208LCJ-1 DAC1210LCJ-1
DAC1230LCJ-1 DAC1231LCJ-1
DAC1232LCJ-1 DAC1231LCN
DAC1232LCN DAC1231LCWM
DAC1232LCWM
0 C s TA s a70 C
Range of VCC
4 75 VDC to 16 VDC
Voltage at Any Digital Input
VCC to GND
Electrical Characteristics
VREFe10 000 VDC VCCe11 4 VDC to 15 75 VDC unless otherwise noted Boldface limits apply from TMIN to TMAX (see
Note 13) all other limits TA e TJ e 25 C
Parameter
Conditions
Notes
Typ
(Note 10)
Tested
Limit
(Note 5)
Design
Limit
(Note 6)
Units
Resolution
12 12 12
Bits
Linearity Error
(End Point Linearity)
Zero and Full-Scale
Adjusted
DAC1208 DAC1230
DAC1209 DAC1231
DAC1210 DAC1232
4 7 13
g0 018 g0 018
g0 024 g0 024
g0 050 g0 05
% of FSR
% of FSR
% of FSR
Differential Non-Linearity
Zero and Full-Scale
Adjusted
DAC1208 DAC1230
DAC1209 DAC1231
DAC1210 DAC1232
4 7 13
g0 018 g0 018
g0 024 g0 024
g0 050 g0 05
% of FSR
% of FSR
% of FSR
Monotonicity
4 12 12 12
Bits
Gain Error (Min)
Gain Error (Max)
Using Internal RFb
Vref e g10V g1V
7 b0 1 0 0
7
b0 1
b0 2
% of FSR
% of FSR
Gain Error Tempco
7 g1 3
g6 0 ppm of FS C
Power Supply Rejection
All Digital Inputs
Latched High
7
g3 0
g30
ppm of FSR V
Reference Input Resistance (Min)
Reference Input Resistance (Max)
13
15
15
10 10
20 20
kX
Output Feedthrough Error
VREFe20 Vp-p fe100 kHz
All Data Inputs Latched
Low
9
30
mVp-p
Output Capacitance
Supply Current Drain
All Data Inputs
Latched High
All Data Inputs
Latched Low
IOUT1
IOUT2
IOUT1
IOUT2
13
200
70
70
200
20 25
pF
pF
pF
pF
mA
Output Leakage Current
IOUT1
IOUT2
All Data Inputs Latched
11 13
01
15
15
Low
All Data Inputs Latched
11 13
01
15
15
High
nA
nA
Digital Input Threshold
Digital Input Currents
Low Threshold
High Threshold
Digital Inputs k0 8V
Digital Inputs l2 2V
13
13
13
13
08
22
b200
10
08
22
b200
10
VDC
VDC
mADC
mADC
2

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