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AL3201 डेटा पत्रक PDF( Datasheet डाउनलोड )


डेटा पत्रक - SCR/ or Single Chip Reverb - ETC

भाग संख्या AL3201
समारोह SCR/ or Single Chip Reverb
मैन्युफैक्चरर्स ETC 
लोगो ETC लोगो 
पूर्व दर्शन
1 Page
		
<?=AL3201?> डेटा पत्रक पीडीएफ

AL3201 pdf
Electrical Characteristics and Operating Conditions
Parameter
Description
Condition
Min Typ Max Units
Electrical Characteristics and Operating Conditions
VDD Supply Voltage
IDD Supply Current : SCR
Gnd
Ground
Note 3
FS Sample rate
Temp
Temperature
Outputs (DigOut, SysClk, BitClk, WordClk)
3.0/4.5
6/9
-
24 1
0
3.3/5.0
7/10
0.0
48
25
3.6/5.5
8/11
-
50 1
70
V
mA
V
kHz
°C
VOH
Logical “1” output voltage
Unloaded
0.9 VDD
VDD
-
VOL
Logical “0” output voltage
Unloaded
- 0 0.05 VDD
IOH
Logical “1” output current VDD=5V VO=4.5V
-
- -8.0
IOL
Logical “0” output current VDD=5V VO=0.4V
-
- 8.0
_______________
__________________________
Inputs (DigIn, Int/Ext, Prog0/Sdata, Prog1/SClk, Prog2, Prog3, Reset) Notes 2,4
V
V
mA
mA
VIH Logical “1” input voltage
2.5
-
VDD
V
VIL Logical “0” input voltage
0 - 0.5 V
IIH
Logical “1” input current
VDD=VIH=5V
-
- 2 µA
IIL
Logical “0” input current
No pullup pin
-
-
2 µA
IILP
Logical “0” input current
Pullup pin, Vin=0
83
167 333 µA
CIN Input Capacitance
- 2.0 - pF
Note:
1. Changing the sample rate (by changing the crystal frequency) will change the maximum delay
available through the DRAM proportionally. Low sample rates require more refresh instructions.
2. XtalIn, XtalOut are special pins designed to be connected to a crystal. XtalOut is a relatively weak pin
(about 0.2 mA) and should not be used to drive external circuits. Instead of using a crystal, XtalIn
may be driven by a standard VDD to Gnd logic signal, but the logic levels are not specified.
3. All other voltages are relative to Gnd.
4. Bypass (pin 14) must never exceed 3.6V
Pin Descriptions: AL3201 SCR
Pin #
Name
Pin Type
1 DigOut
2 Int/Ext______________
Output
Input*
3 XtalIn
Input
4 XtalOut
Output
5 Prog0/SData
Bidirectional*
6 Prog1/SClk
Input*
7 Prog2
Input*
8 Prog3
Input*
9 WordClk
Output
10 BitClk
Output
11 SysClk
Output
12
_____________________
Reset
Input
13 Gnd
Ground
14 Bypass
Bidirectional
15 VDD
Power
16 DigIn
Input
(*: Pullup to VDD via nominal internal 30kresistor)
Description
Digital serial output for stereo DAC.
Internal/external program selection. 1:Internal, 0:External.
12.288MHz crystal input.
12.288MHz crystal output.
Internal program select 0 / serial interface data line.
Internal program select 1 / serial interface clock line.
Internal program select 2.
Internal program select 3.
Word clock output.
Bit clock output.
System clock output.
Active low reset.
Ground connection.
Connect 0.1µF bypass capacitor to Gnd for internal +3.3V regulator.
+5V/+3.3V VDD power pin. Connect 0.1µF capacitor to Gnd.
Digital serial input from stereo ADC.
Alesis Semiconductor
DS3201-0802
12555 Jefferson Blvd., Suite 285
Los Angeles, CA 90066
Phone (310) 301-0780 Fax (310) 306-1551 www.alesis-semi.com
-2-

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